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Department of Electrical and Computer EngineeringJake Adriaens

Jake Adriaens
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Integrated GPU and CPU Reading Group

Meets Wednesdays 2:00-3:00 in 3632EH

Reading for Wednesday 04-15-09
Nvida's GT200: Inside a Parallel Processor
Original source: Nvida's GT200: Inside a Parallel Processor

Reading for Wednesday 04-01-09
Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow

Reading for Wednesday 03-25-09
Tradeoffs in Designing Accelerator Architectures for Visual Computing

Reading for Wednesday 03-18-09
Analyzing CUDA Workloads Using a Detailed GPU Simulator

Reading for Wednesday 03-11-09
Design and Implementation of a Configurable Heterogeneous Multicore SoC With Nine CPUs and Two Matrix Processors

Readings for Wednesday 03-04-09
Data-Parallel Programming on the Cell BE and the GPU using the RapidMind Development Platform
Nvidia Tesla: A Unified Graphics and Computing Architecture

Readings for Wednesday 02-25-09
Parallel Processing With CUDA
Future Graphics Architectures

Readings for Wednesday 02-11-09
Optimization Principles and Application Performance Evaluation of a Multithreaded GPU Using CUDA
Toward A Multicore Architecture for Real-time Ray-tracing

Readings for Wednesday 02-04-09
Larrabee: A Many-Core x86 Architecture for Visual Computing
GPU Virtualization on VMware's Hosted I/O Architecture

Readings for Wednesday 01-28-09
Introduction to the Cell multiprocessor
EXOCHI: Architecture and Programming Environment for A Heterogeneous Multi-core Multithreaded System

Readings for Friday 01-23-09
GPU Gems 2: Chapter 29 - Streaming Architectures and Technology Trends
GPU Gems 2: Chapter 30 - The GeForce 6 Series GPU Architecture
Pangaea: A Tightly-Coupled IA32 Heterogeneous Chip Multiprocessor

Possible Future Readings
GRAMPS: A Programming Model for Graphics Pipelines
Towards Dense Linear Algebra for Hybrid GPU Accelerated Manycore Systems


 
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