Fall 2013-2014

--- THIS SITE WILL BE UPDATED ON REGULAR BASIS DURING THE SEMESTER ---

Tuesday 4:00-5:00, Room xxxx Engineering Hall

M 2:00-3:00;

T 2:00-3:00;

W 2:00-3:00;

and Other days and times by appointments only.

Correction to the text:

9/3

9/10 Test Economics (Contd.) - Yield equation - Yield, defect, coverage and relation between these - Parameter estimation - Impact on cost at higher levels (such as board level)

9/17 Fault Modeling (continued) - Defect statistics - Common fault models - Single stuck-at fault - and its justification - What is a test, how to find a test for a fault - Fault detection and redundancy - Fault list reduction - fault equivalences 9/19 Fault Modeling (continued) - fault dominance, checkpoint faults - Some important theorems - transistor faults

9/24 Logic Simulation (continued) - Gate evaluation and determining signal values - True value simulation algorithms - Compile-code simulation - Event-driven simulation

10/1 Fault Simulation (contd.) - Fault simulation algorithms - other simulators (e.g. parallel pattern single fault) - statistical fault simulation method (sampling) -- READ from the text --

10/8 Test Generation - combinational circuits ATPG (contd.) - D-Algorithm and an example - Podem - Comments on the algorithms

10/15 ATPG systems and testability analysis (contd.) Testability measures - SCOAP measure: combinational - SCOAP measure: Sequential - Applications of SCOAP Comments - estimating the size of a test set for a circuit

10/22 Sequential Circuit ATPG (contd.) - Comments on FASTEST - forward and reverse time test generation - Simulation based test generators CONTEST and genetic methods - comments on ATPG systems and testability measures

10/29 Checking experiment approach to testing (contd.) - design of checking sequence - complexity

11/5

11/12

11/19 There will be NO lecturer today (I will be away at ATS) 11/21 There will be NO lecturer today (I will be away at ATS)

11/26

12/3

12/10 Final Project Report Due Today (Tuesday December 10) Built-in Self-Test (BIST) (contd.) - Pattern generation primitive polynomials, zero insertion - Weighted pattern generation and other alternatives - Response compaction LFSR, MISR - Aliasing and other basic issues

12/17