TOOLS And TIPS

Tech Files:

Audio loop back using audio CODEC

mdlring.zip (mltring with DLL)

PC to SRAM Loader

test upload/download

VGA RAMDAC

Documentation and Datasheets:

Audio CODEC datasheet

Data-File Conversion to INTEL HEX-32 Format (doc)

Excerpts from Virtex Data Sheets for Xilinx Virtex Technology Lecture (pdf)

GXSTOOLs V3.3 User Manual

This manual applies to the GXS tools (not 4.0).

How CPLD is programmed to connect to PC's parallel (serial) port ?

Intel Hexadecimal Object File - Format Specification, Revision A, 1/6/88

This provides the format for .HEX files for use with the board SRAM.

RAMDAC on XSV800 Board

Simple Idea for VGA display

SRAM Datasheet

Verilog code and data file for implementing a ROM

These files illustrate the use of Verilog code to model a memory and place fixed contents in it to implement a ROM as part of a testbench. The ROM is initialized using the $readmemh Verilog system call. By adding additional Verilog code to implement write and delays, this same method can be used to model an SRAM outside of the FPGA and initialize code/data in the SRAM.

Verilog Standard Access

VHDL Memory Model from Peter Ashenden's book

Xilinx - Using the Virtex Delay-Locked Loop (pdf)

Xilinx - Using Virtex SelectRAM+ Features (pdf)

Xilinx - Virtex 2.5 V Field Programmable Gate Arrays (pdf)

XSTOOLs - V4.0 User Manual

XSV Board V1.0 Manual (pdf)

This manual applies to the version of the board that we have.

XSV Board V1.1 Manual (pdf)

This manual may apply to a newer version of the board than we have but there is useful added information in it.