Department of Electrical and Computer Engineering
University of Wisconsin - Madison

ECE 554 Digital Engineering Laboratory

Course Syllabus - Spring 2008-09

 

1. OBJECTIVES:

1) Deal with problems and solutions associated with many aspects of a large digital design project,
2) Work effectively as a member of a moderate-sized team,
3) Use contemporary commercial design tools, and
4) Use programmable, user-defined devices for rapid prototyping.

 

2. PREREQUISITES: ECE 351, ECE/CS 552, ECE551 is recommended.

3. TEXTBOOK: Handouts, materials, and manuals on-line.

4. INSTRUCTORS:

Nam Sung Kim, 4615 EH, nskim@engr.wisc.edu

Office hours: Tuesday/Wednesday/Thursday 2:00-3:00pm

Chunhua Yao: yao1@wisc.edu
Office hours are assigned lab hours (3:30 to 6:30pm Tuesdays and Thursdays)

4. LOCATIONS:

Laboratory: Room 3628 EH (TR 3:30 PM to 6:30 PM) (Phone in attached room 3654: 265-3803 - Campus Only)
Lectures: Room 3444 EH (W 12:05 PM to 12:55 PM)
Lectures and Design Reviews: Room 3444 EH (TR) during lab hours, marked C on outline.

5. PROJECT: The project is to design, implement, test, and program a general or special purpose digital computer, usually emphasizing some particular features. Project groups are five to nine in size. Teamwork and realistic project scheduling and monitoring are emphasized. Project progress reports are marked PR on outline.

6. GRADING POLICY: 15% Lab Exercises; 20% Midterm/Bench Exam; 65% Project; No Final Exam.

7. TENTATIVE OUTLINE:

Week

Date

Section

Topic or Activity

;nbsp;

;nbsp;

;nbsp;

 

1

1/21

Lec

Course Introduction

1/22

Lab C

FPGA Concepts and Design

;nbsp;

;nbsp;

;nbsp;

;nbsp;

2

1/27

Lab

FPGA Design Tutorial, Miniproject Team Selection

1/28

Lec

Laboratory Environment, Miniproject Assignment

1/29

Lab

Miniproject Organization, Design, and Simulation

;nbsp;

;nbsp;

;nbsp;

;nbsp;

3

2/3

Lab

Miniproject Synthesis and Debug, Project Team Selection

2/4

Lec

Course Project Assignment, Working in Teams

2/5

Lab

Miniproject Demo and Report Due, Architecture Meeting

;nbsp;

;nbsp;

;nbsp;

;nbsp;

4

2/10

Lab

Architecture Meeting

2/11

Lec

Register Files and Memory, Design Issues

2/12

Lab C

Architecture Meeting, Project Proposal

;nbsp;

;nbsp;

;nbsp;

;nbsp;

5

2/17

Lab

Architecture Meeting

2/18

Lec

Bench Exam Overview

2/19

Lab C

Architecture Review

;nbsp;

;nbsp;

;nbsp;

;nbsp;

6

2/24

Lab

Microarchitecture Meeting, ISA Report Due

2/25

Lec

--

2/26

Lab

Bench Exam  

;nbsp;

;nbsp;

;nbsp;

;nbsp;

7

3/3

Lab

Microarchitecture Meeting

3/4

Lec

--

3/5

Lab

Microarchitecture Meeting, Logic Design & Entry

;nbsp;

;nbsp;

;nbsp;

;nbsp;

8

3/10

Lab

Microarchitecture Meeting, Logic Design & Entry, PR

3/11

Lec

--

3/12

Lab

Logic Design & Simulation

;nbsp;

;nbsp;

;nbsp;

;nbsp;

9

3/17

Lab C

--

3/18

Lec

Spring Break

3/19

Lab

--

;nbsp;

;nbsp;

;nbsp;

;nbsp;

10

3/24

Lab

Subsystem Design & Simulation

3/25

Lec

--

3/26

Lab C

Microarchitecture Review

;nbsp;

;nbsp;

;nbsp;

;nbsp;

11

3/31

Lab

Subsystem Design & Simulation, PR

4/1

Lec

--

4/2

Lab

System Simulation & Debug

;nbsp;

;nbsp;

;nbsp;

;nbsp;

12

4/7

Lab C

System Simulation & Debug, Testing and Demo Review

4/8

Lec

--

4/9

Lab

Hardware Test & Debug

;nbsp;

;nbsp;

;nbsp;

;nbsp;

13

4/14

Lab

Hardware Test & Debug

4/15

Lec

--

4/16

Lab

Hardware Test & Debug, PR

;nbsp;

;nbsp;

;nbsp;

;nbsp;

14

4/21

Lab

Software Test & Debug

4/22

Lec

--

4/23

Lab

Software Test & Debug, PR

;nbsp;

;nbsp;

;nbsp;

;nbsp;

15

4/28

Lab

Demo Preparation

4/29

Lec

Final Charge and Course Evaluation

4/30

Lab

Demo Preparation

;nbsp;

;nbsp;

;nbsp;

;nbsp;

16

5/5

Lab

Project Completion

5/6

Lec

--

5/7

Lab

Project Demonstration

;nbsp;

;nbsp;

;nbsp;

;nbsp;

17

5/14

All

Final Project Report Due