What has been successfully done in the past on this board?

A scalar processor with I/O such as VGA, PS2 mouse

A simple 2-way superscalar processor with In-order issue and out-of-order commit and variable-length instruction encoding

Can my project with these specifications fit the FPGA chip?

This is a very difficult question to answer. A simple rule of thumb is not to go beyond 32-bit instruction and data width. The concern is not the capacity directly but rather the amount of time for the tool and students to get it done.

How complex the project is expected?

Any project in between a 32-bit simple scalar pipelined processor and a 2-way 32-bit superscalar processor should be ok.

What are the minimum requirements?

This depends on the instructor.

How to estimate the clock frequency?

A simple rule to estimate is 0.1ns/operator/bit.

How to improve the clock speed?

Manually insert buffers on high fan-out net (link) such as mux select signals, and etc.

Don't use the Muxes from Xilinx Core Generator!

Use the simple If-Else or Case statements instead.

Should we write our own ALU in Verilog?

Most of the arithmetic units are available in Core Generator

How to build a register file?

Read the lecture and use Core Gen. To get block(s) of BlockSRAM.

Why do we have to use "mdlring.v"?

It has been developed as a framework for the students to instantiate the processor at the topmost level of abstraction. It can protect the hardware (XSV800 board) from any harm cause by the students.

Rule of thumb: the more complexity the slower clock frequency

How to do version control?

There are many different ways to do version control depending on the granularity of the objects.

The version-controlled object can be every single file with date and timestamp as part of the filename or the whole directory.

Which one is the working version?

The team should create a protocol on how to keep the working version.

What changes did you make to my file?

Again, the team should have a simple protocol on how to keep the log.

One of the many possible ways to do version control?

1. Create a global directory that always keeps the necessary files from everyone plus a log file telling what you (anyone) have done to any file.
2. Whenever a team member wants to modify a number of files, that member must always copy those files and make changes in his own directory until it's done. Before putting those files back, he must make backups for those files in his own directory. This depends on how many revisions you want to keep.
3. Naming a file, you have two choices:
a. Always name your file exactly the same as the module's name. Each file contains only one module.
b. Each person has only one file named after his that stores all of his modules together.
4. (Top-down approach) Always identify the interfaces between modules clearly by making the skeletons before working for each module.

How are we going to schedule the project?

The schedule must start from the demonstration date backward to the current date.

What is realistic and what is not?

Any schedule that is either too optimistic, which has no slack, or too pessimistic, which has too much slack.

How are we going to make up if we want to take break during Spring break?

Spring break must be taken into account during the initialization. If they are on schedule, they are safe to do so. If not, they should be encouraged to take a short break.

Are we going to work during Spring break?

It is the consensus of the team members. Some can stay if they want to.

What is your plan for this semester?

Some students may have a busy schedule. Their teammate should take that into consideration.

Can I be late or absent because of my interview?

You should tell other team members in advance.

What is the format of the reviews?

30-minute presentation and 30-minute question and answer.

What are we going present in Architecture review?

The review should cover item 3-5 specified in the Project handout.

 What are we going present in Microarch. review?

The review should cover item 6 and 7 specified in the Project handout. 

What should the TA do when some students are too busy with other activities?

Try to encourage other students to accept more responsibility.

When a team is not going to finish the project in time?

Tell the students to demonstrate the following: Functional simulation of the working instructions Presentation of what is and what is not working

When a team is going to finish the project early with a fairly low design complexity compared to others’?

Ask the students to evaluate what could be done next in terms of hardware and software

Tell the students to back up the current working version and work on something new

Tell the student to start preparing the report

What are we expected to show in the demonstration?

The program that shows the functionality of your ISA.

Your demonstration software

How long would it take?

The format is the same as the previous two reviews about 40-50 minutes long

What should we do in the demo if we cannot get it to work in time?

You should prepare for the presentation to review the expected features of the system and its functional simulation.

Can we get an extension?

No.

What should we put in final presentation/demonstration ?

The final presentation/demonstration may consist of the following information:

1. Project overview
2. ISA overview
3. Organization overview
4. Actual Hardware/Resource Consumption
5. Software overview
6. Performance aspects
7. Future work if possible

In other words, the presentation is the summary of your final report.

What kinds of program are expected?

Programs that can show the performance of your processor or similar to some benchmarks.

What is the format?

As specified in the Project handout

How thorough this report is expected?

The report is expected to be a manual of your project such that an external programmer can write a simple program on it.

You should use visual aids such as state diagrams, system diagrams, and etc. for major blocks such as controllers, caches, and so on.

Individual contribution should be described quantitatively and qualitatively.

What are the audiences of this report?

The instructors.

What is a good annotation in the report?

Annotation that can explicitly show the causes and effects of a given program listing is considered good.

How to make the code printouts?

1. Any source code must be printed in two-column mode. Printing Verilog code from HDL Editor is recommended. Not many editors can highlight the keywords and number the lines for you.

2. Any Verilog module instantiation without the .portname (wire/bus) notation will be penalized.

3. The code should be well commented, aligned, and grouped in one or more appendix. Do not interleave your source code with its description.