ECE 734 Course Project

Spring 2002

Name Project Title Presentation
Arunachalam, Arjun Lms algorithm FOR NON-STATIONARY INPUTS FOR THE PIPELINED IMPLEMENTATION OF ADAPTIVE ANTENNAS W, 11:08, PPT, Report
Baik, Dong and Kim, Ilhyun Mapping DSP algorithms to a general purpose out-of-order processor W, 11:44, PPT, Report
Chen, Jun, and Long, Changbo Circuit resynthesis by pipelining and simultaneous retiming and clock scheduling W, 11:26, PPT
Chen, Tsung-Hao, and Wang, Kuang-Ching FIR/IIR Look-ahead, pipeline/retiming, unfolding transformations with a GUI F, 11:20, PPT, Report
Cheng, Jui-Ning  A Survey of CORDIC-Based Processor W, 11:14, PPT
Fu, Wenyin An Application of MMX technology W, 11:20, PPT
Koka, Pranay Verilog Implementation of CORDIC adaptive lattice filter (CALF) W, PPT, Report
Krepanith, Sarawadee An Investigation of Hardware Implementation for Block Based Motion-Estimation Algorithm. F, 11:32, PPT
Li, Fei, and Xiong, Jinjun Speed up an FSM by nonlinear lookahead transform and its applications to Huffman decoding W, 11:26, PPT
Ma, Dazhuang Survey of retiming algorithm and applications F, 11:38, PPT
Mamidi, Suman, and Vudhichamnong, Rattapoom OPTIMIZING WAVELET BASED IMAGE COMPRESSION FOR TMS320C6x F, 11:08, PPT
Narayana, Ramya MMX Study and implementation F, 11:50, PPT
Ni, Shyh-Jye, and Junaid Shoaib JPEG 2000 encoding compression F, 11:26, PPT
Oberstar, Erick Investigate the implementation of a 2nd order IIR filter on the Atmel AVR line of microcontrollers F, 11:02 Documentation related to report
Pratoomtong, Saengrawee A survey on Reconfigurable Computing for Signal Processing Appplicaitons W, 11:02, PPT, Report
Siegel, Sebastian Implementation of 2-D FIR filters on systolic arrays for image processing F, 11:14, PPT, Report, Program
Xu, Min A survey of recent media processors W, 11:38, PPT
Yang, Xinsong MMX F, 11:44, PPT