ECE 734: Project Proposal
Sarawadee  Krepanith

Title:  An Investigation of Hardware Implementation for Block Based
        Motion-Estimation Algorithm.

Abstract:
Most of the popular high-compression video codecs use powerful algorithms
for images encoding and decoding.  The main purpose of video coding is to
reduce the bit rate by removing the redundant information.  Two important
algorithms for video compressions are discrete cosine transform (DCT) for
the reduction of spatial redundancy and block-based motion compensation
for the reduction of temporal redundancy.  There are several algorithms
propose for accomplishing DCT and motion estimation.  These algorithms
vary in accuracy, complexity, and execution speed.  For motion
compensation estimation the full search based block matching method is
computationally very expensive, but give fairly accurate results.  There
are others search methods that propose which are faster at the expense of
accuracy.  Examples are three step search, 2-D logarithmic search, the
conjugate search, etc.  Motion estimation requires the most processing
power and is the bottleneck step in video coding.  Various hardware
designs have been propose for implementing different block-matching
algorithms.  As the three-step search has been claimed that it is one of
the best algorithms, in this project, hardware implementation for
three-step search algorithm will be studied carefully.  The comparison
in various aspects will be delivered and the conclusion will be draw at
the end.