Project Proposal for ECE 734 Final Project

Team Members:
Rajagopal, Harish
ID: 9022588447
Nawani, Varun
ID: 9024285240
Project Title: Design of optimized engine for Direct Sequence Spread Spectrum Transciever

Abstract:
Direct Sequence Spread spectrum is the technique used in popular applications such as IEEE 802.11b and CDMA. The basic building blocks of the transceiver consist of a pseudo random sequence generator, Digital Matched filter, Delay locked loop which consists of a detector, loop filter and numerically controlled oscillator.
The structure of the transceiver lends itself to various DSP based optimizations which is the primary reason that we selected it for our project.  The most sensitive part of a Direct Sequence Spread Spectrum system is the synchronization of the transmitter’s pseudo random sequence to that of the receiver where an offset of even one chip cycle can result in noise rather than a de-spread symbol sequence. In this context reducing the clock cycle and pipelining the structure becomes very important. The receiver consists of the code acquisition and tracking mechanism based on digital matched filters. The acquisition part serves the role of spectrum dispreading at the receiver and can be also reused at the transmitter for spectrum spreading.
The digital matched filter serves as a critical element of the direct sequence spread spectrum engine. Hence the optimization of this structure help us in increasing the clock cycle and thus offer a better correlation for faster synchronization of the pseudo random sequence at the transmitter and the receiver.

References:
Rupert Baines and Doug Pulley, “A Total Cost Approach to Evaluating Different Reconfigurable Architectures for Baseband Processing in Wireless Receivers,” IEEE Communications Magazine, Volume: 41 Issue: 1: January 2003, Page(s): 105 - 113.

Chi-Kin Cha and Wong-Hing Lam, “ Efficient use of pseudo-noise sequences in synchronous direct-sequence spread-spectrum multiple-access communication systems,” In proceedings of the 44th IEEE Conference on Vehicular Technology Conference, Volume: 1, 8-10 June 1994, Page(s): 540 –544.

M. Cummings, and S. Haruyama ,” FPGA in the software radio,” IEEE Communications
Magazine, Volume: 37 Issue: 2 , February 1999, Page(s): 108 – 112.