Video Coding Implementation

Design approaches for MPEG engines for broadband and mobile applications
Kuroda, K.; Nishitani, T.;
Signal Processing Systems, 2002. (SIPS '02). IEEE Workshop on , 16-18 Oct. 2002
Pages:3 - 8

A stand-alone DSP-based real time implementation of the MPEG audio layer 2 algorithm
Hong-Beng Yak; Sua-Hong Neo; Brefort, A.; Rosinski, K.;
Singapore ICCS/ISITA '92. 'Communications on the Move' , 16-20 Nov. 1992
Pages:770 - 773 vol.2

VLSI implementation of portable MPEG-4 audio decoder
Hashimoto, S.; Niwa, A.; Okuhata, H.; Onoye, T.; Shirakawa, I.;
ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International , 13-16 Sept. 2000
Pages:80 - 84

A hardware efficient VLSI implementation of MPEG-4 format conversion filters
Kichul Kim; Jinjong Cha;
VLSI and CAD, 1999. ICVC '99. 6th International Conference on , 26-27 Oct. 1999
Pages:313 - 316

An architecture and implementation of MPEG audio layer III decoder using dual-core DSP
Kyu Ha Lee; Keun-Sup Lee; Tae-Hoon Hwang; Young-Cheol Park; Dae Hee Youn;
Consumer Electronics, IEEE Transactions on , Volume: 47 , Issue: 4 , Nov. 2001
Pages:928 - 933

Rapid prototyping for an optimized MPEG-4 decoder implementation over a parallel heterogenous architecture
Ventroux, N.; Nezan, J.F.; Raulet, M.; Deforges, O.;
Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03). 2003 IEEE International Conference on , Volume: 2 , 6-10 April 2003
Pages:II - 433-6 vol.2

HW/SW partitioned optimization and VLSI-FPGA implementation of the MPEG-2 video decoder
Verderber, M.; Zemva, A.; Lampret, D.;
Design, Automation and Test in Europe Conference and Exhibition, 2003 , 2003
Pages:238 - 243 suppl.

Implementing real-time video decoding on multimedia processors by complexity prediction techniques
Mattavelli, M.; Brunetton, S.;
Consumer Electronics, IEEE Transactions on , Volume: 44 , Issue: 3 , Aug. 1998
Pages:760 - 767

Hardware-software co-implementation of a H.263 video codec
Jang, S.K.; Kim, S.D.; Lee, J.; Choi, G.Y.; Ra, J.B.;
Consumer Electronics, IEEE Transactions on , Volume: 46 , Issue: 1 , Feb. 2000
Pages:191 - 200

An FPGA implementation of a flexible architecture for H.263 video coding
Garrido, M.J.; Sanz, C.; Jimenez, M.; Meneses, J.M.;
Consumer Electronics, 2002. ICCE. 2002 Digest of Technical Papers. International Conference on , 18-20 June 2002
Pages:274 - 275

A low-bit rate multimedia communication system with improved software-based H.263 codec
Liu Tieyan; Zhang Xudong; Liu Zhixin; Wang Desheng; Cao Wei;
Communication Technology Proceedings, 1998. ICCT '98. 1998 International Conference on , 22-24 Oct. 1998
Pages:5 pp. vol.1

A single-chip MPEG-2 codec based on customizable media microprocessor
Ishiwata, S.; Yamakage, T.; Tsuboi, Y.; Shimazawa, T.; Kitazawa, T.; Michinaka, S.; Yahagi, K.; Takeda, H.; Oue, A.; Kodama, T.; Matsumoto, N.; Kamei, T.; Miyamori, T.; Ootomo, G.; Matsui, M.
Page(s): 163- 166

An ultra low power, realtime MPEG2 MP@HL motion estimation processor core with SIMD datapath architecture optimized for gradient descent search algorithm
Miyama, M.; Tooyama, O.; Takamatsu, N.; Kodake, T.; Nakamura, K.; Kato, A.; Miyakoshi, J.; Hashimoto, K.; Komatsu, S.; Yagi, M.; Morimoto, M.; Taki, K.; Yoshimoto, M.
Page(s): 167- 170

A low-power highly-integrated MPEG1/2 audio layer 3 (MP3) decoder for CD-based systems
Cloetens, H.; Hahn, R.; Hooser, B.; Lenke, F.
Page(s): 171- 174