Parallel
Viterbi algorithm implementation: breaking the ACS-bottleneck
Fettweis, G.; Meyr, H.;
Communications, IEEE Transactions on , Volume: 37 , Issue:
8 , Aug. 1989
Pages:785 - 790
[Abstract] [PDF Full-Text (508 KB)] IEEE JNL
Soft-output
Viterbi decoding: VLSI implementation issues
Joeressen, O.J.; Vaupel, M.;
Meyr, H.;
Vehicular Technology Conference, 1993 IEEE 43rd , 18-20 May
1993
Pages:941 - 944
[Abstract] [PDF Full-Text (384 KB)] IEEE CNF
Boosting
the implementation efficiency of Viterbi decoders by novel
scheduling schemes
Bitterlich, S.; Dawid, H.; Meyr,
H.;
Global Telecommunications Conference, 1992. Conference Record.,
GLOBECOM '92. 'Communication for Global Users'., IEEE , 6-9
Dec. 1992
Pages:1260 - 1264 vol.3
[Abstract] [PDF Full-Text (552 KB)] IEEE CNF
A low-power
systolic array-based adaptive Viterbi decoder and its FPGA
implementation
Man Guo; Omair Ahmad, M.; Swamy,
M.N.S.; Chunyan Wang;
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003
International Symposium on , Volume: 2 , 25-28 May 2003
Pages:II-276 - II-279 vol.2
[Abstract] [PDF Full-Text (366 KB)] IEEE CNF
An
implementation scheme for a Viterbi decoder
Aboul-Dahab, M.A.; Ashry, M.F.;
Salih, S.A.; Abd-El-Galil, M.E.;
Radio Science Conference, 1998. NRSC '98. Proceedings of the
Fifteenth National , 24-26 Feb. 1998
Pages:C22/1 - C22/8
[Abstract] [PDF Full-Text (664 KB)] IEEE CNF
Viterbi
hardware implementation for GSM
Wang Kaiming; Wu Weiling;
TENCON '93. Proceedings. Computer, Communication, Control and
Power Engineering.1993 IEEE Region 10 Conference on , Issue:
0 , 19-21 Oct. 1993
Pages:120 - 122 vol.3
[Abstract] [PDF Full-Text (172 KB)] IEEE CNF
Survivor
sequence memory management in Viterbi decoders
Feygin, G.; Gulak, P.G.;
Circuits and Systems, 1991., IEEE International Sympoisum on , 11-14
June 1991
Pages:2967 - 2970 vol.5
[Abstract] [PDF Full-Text (336 KB)] IEEE CNF
Implementation
of scalable power and area efficient high-throughput Viterbi
decoders
Gemmeke, T.; Gansen, M.; Noll, T.G.;
Solid-State Circuits, IEEE Journal of , Volume: 37 , Issue:
7 , July 2002
Pages:941 - 948
[Abstract] [PDF Full-Text (294 KB)] IEEE JNL
Novel
Viterbi decoder VLSI implementation and its performance
Kubota, S.; Kato, S.; Ishitani,
T.;
Communications, IEEE Transactions on , Volume: 41 , Issue:
8 , Aug. 1993
Pages:1170 - 1178
[Abstract] [PDF Full-Text (688 KB)] IEEE JNL