The Intel PXA800F
wireless internet-on-a-chip architecture and design
Krishnaswamy, D.; Stevens, R.;
Hasbun, R.; Revilla, J.; Hagan, C.
Page(s): 39- 42
[Abstract] [PDF Full-Text (433 KB)]
Trends and challenges
for wireless embedded DSP's
Clark, L.T.
Page(s): 171- 176
[Abstract] [PDF Full-Text (460 KB)]
MIMO signal processing -
the next frontier for capacity enhancement
Mujtaba, S.A.
Page(s): 263- 270
[Abstract] [PDF Full-Text (693 KB)]
APP processing for high
performance MIMO systems
Garrett, D.; Davis, U.; ten
Brink, S.; Hochwald, B.
Page(s): 271- 274
[Abstract] [PDF Full-Text (377 KB)]
Low power direct digital
frequency synthesizers in 0.18 /spl mu/m CMOS
Langlois, J.M.P.; Al-Khalili, D.
Page(s): 283- 286
[Abstract] [PDF Full-Text (356 KB)]
A 415 MHz direct digital
quadrature modulator in 0.25-/spl mu/m CMOS
Yanlin Wu; Dengwei Fu; Willson,
A.
Page(s): 287- 290
[Abstract] [PDF Full-Text (311 KB)]
A low
power implementation of a W-CDMA receiver on an ultra low power
DSP
Wang, A.; Hezar, R.; Gass, W.;
Global Telecommunications Conference, 2000. GLOBECOM '00. IEEE , Volume:
1 , 27 Nov.-1 Dec. 2000
Pages:241 - 244 vol.1
[Abstract] [PDF Full-Text (524 KB)] IEEE CNF
FPGA
implementation of IS-95 CDMA baseband filter
Yong Lian; Poh Meng Hwee;
ASIC, 2001. Proceedings. 4th International Conference on , 23-25
Oct. 2001
Pages:411 - 415
[Abstract] [PDF Full-Text (445 KB)] IEEE CNF
VLSI
implementation of rake receiver for IS-95 CDMA testbed using FPGA
Leung, O.; Chi-Ying Tsui; Cheng,
R.S.;
Design Automation Conference, 2000. Proceedings of the ASP-DAC
2000. Asia and South Pacific , 25-28 Jan. 2000
Pages:3 - 4
[Abstract] [PDF Full-Text (204 KB)] IEEE CNF
A DSP-based
DS-CDMA multiuser receiver employing partial parallel
interference cancellation
Correal, N.S.; Buehrer, R.M.;
Woerner, B.D.;
Selected Areas in Communications, IEEE Journal on , Volume:
17 , Issue: 4 , April 1999
Pages:613 - 630
[Abstract] [PDF Full-Text (592 KB)] IEEE JNL