Only the portions in bold letters are a part of the input file to the CAFE.

 The input file starts below
------------------------------------------
 
      

       <table>

9  s4 s3 s2 s1 s0 i3 i2 i1 i0.
5                              n4 n3 n2 n1 n0.
   0  0  0  0  0  x  x  x  x   0  0  0  0  1
   0  0  0  0  1  1  0  x  0   0  0  0  1  0
   0  0  0  1  0  1  0  0  0   0  0  0  1  1
   0  0  0  1  1  x  x  x  x   0  0  1  0  0
   0  0  1  0  0  x  x  x  x   0  0  0  0  0
   0  0  0  1  0  1  0  1  0   0  0  1  0  1
   0  0  1  0  1  x  x  x  x   1  1  1  1  1
   0  0  0  0  1  1  0  x  1   0  0  1  1  0
   0  0  0  0  1  1  1  1  1   0  0  1  1  0
   0  0  1  1  0  1  0  1  1   0  0  1  1  1
   0  0  1  1  1  x  x  x  x   0  0  0  0  0
   0  0  1  1  0  1  0  0  1   0  1  0  0  0
   0  1  0  0  0  x  x  x  x   0  0  0  0  0
   0  0  1  1  0  1  1  1  1   0  1  0  0  1
   0  1  0  0  1  x  x  x  x   0  1  0  1  0
   0  1  0  1  0  x  x  x  x   0  0  0  0  0
   0  0  0  0  1  1  1  0  0   0  1  0  1  1
   0  1  0  1  1  x  x  x  x   0  0  0  0  0
   0  0  0  0  1  0  1  0  1   0  1  1  1  0
   0  1  1  1  0  x  x  x  x   0  1  1  1  1
   0  1  1  1  1  x  x  x  x   1  0  0  0  0
   1  0  0  0  0  x  x  x  x   1  0  0  0  1
   1  0  0  0  1  x  x  x  x   1  0  0  1  0
   1  0  0  1  0  x  x  x  x   1  0  0  1  1
   1  0  0  1  1  x  x  x  x   1  0  1  0  0
   1  0  1  0  0  x  x  x  x   1  0  1  0  1
   1  0  1  0  1  x  x  x  x   1  0  1  1  0
   1  0  1  1  0  x  x  x  x   1  0  1  1  1
   1  0  1  1  1  x  x  x  x   1  1  0  0  0
   1  1  0  0  0  x  x  x  x   0  0  0  0  0
   0  0  0  0  1  0  0  x  x   0  1  1  0  0 
   0  0  0  0  1  0  1  1  x   0  1  1  0  0
   0  0  0  0  1  0  1  0  0   0  1  1  0  0
   0  1  1  0  0  x  x  x  x   0  1  1  0  1
   0  1  1  0  1  x  x  x  x   0  0  0  0  0
   1  1  1  1  1  x  x  x  x   0  0  0  0  0.
 <process>
c n4 n3 n2 n1 n0.









------------------------------------------
The input file ends here.





Another Example



    <table>


5  S4 S3 S2 S1 S0.
14                 PCWrite Memsrc Mem_rw MDRSrc IRWrite ReadReg1_1 ReadReg1_0 WrAddr WrData1 WrData0 RegWrite AluSrcA1 AluSrcA0 AluSrcB1.
    0  0  0  0  0    1      0     1       x     1       0          x          x      x        x       0        0        1        1 
    0  0  0  0  1    0      x     1       x     0       0          0          x      x        x       0        0        1        0
    0  0  0  1  0    0      x     1       x     0       0          1          x      x        x       0        1        1        1
    0  0  0  1  1    0      1     1       0     0       0          x          x      x        x       0        x        x        x
    0  0  1  0  0    0      x     1       0     0       0          x          0      0        0       1        x        x        x
    0  0  1  0  1    0      1     0       x     0       0          1          x      x        x       0        x        x        x 
    0  0  1  1  0    0      x     1       x     0       0          1          x      x        x       0        x        x        x
    0  0  1  1  1    0      x     1       x     0       0          x          0      1        0       1        x        x        x
    0  1  0  0  0    0      x     1       x     0       0          x          0      1        1       1        x        x        x
    0  1  0  0  1    0      x     1       x     0       0          x          x      x        x       0        0        0        1
    0  1  0  1  0    0      x     1       x     0       0          x          0      0        1       1        x        x        x 
    0  1  0  1  1    0      x     1       x     0       0          x          x      x        x       0        x        x        x
    0  1  1  0  0    0      x     1       x     0       0          x          x      x        x       0        0        0        0 
    0  1  1  0  1    0      x     1       x     0       0          x          0      0        1       1        x        x        x
    0  1  1  1  0    0      x     1       1     0       0          x          x      x        x       0        x        x        x 
    0  1  1  1  1    0      x     1       1     0       0          x          x      x        x       0        1        0        x 
    1  0  0  0  0    0      x     1       1     0       1          x          x      x        x       0        1        0        x
    1  0  0  0  1    0      x     1       1     0       1          x          x      x        x       0        1        0        x
    1  0  0  1  0    0      x     1       1     0       1          x          x      x        x       0        1        0        x
    1  0  0  1  1    0      x     1       1     0       1          x          x      x        x       0        1        0        x
    1  0  1  0  0    0      x     1       1     0       1          x          x      x        x       0        1        0        x
    1  0  1  0  1    0      x     1       1     0       1          x          x      x        x       0        1        0        x
    1  0  1  1  0    0      x     1       1     0       1          x          x      x        x       0        1        0        x
    1  0  1  1  1    0      x     1       1     0       1          x          1      0        0       1        x        x        x 
    1  1  0  0  0    0      x     1       x     0       1          x          0      0        1       1        x        x        x. 
    
   <process>

c PCWrite Memsrc Mem_rw MDRSrc IRWrite ReadReg1_1 ReadReg1_0 WrAddr WrData1 WrData0 RegWrite AluSrcA1 AluSrcA0 AluSrcB1.










Created by 
Manoj Geo Varghese
TA ECE-552
Spring 2002