Department of Electrical and Computer Engineering University of Wisconsin - Madison Computer Engineering Seminar (Spring 2007-2008)

                      SPECIAL SEMINAR 

        Speaker:    Martha Mercaldi Kim
        Time:       4:00 PM 
        Date:       April 17, 2008    --- THURSDAY ---
        Location:   Room 1221, CS     --- Please NOTE the location ---  

        Subject:    Reining in Fabrication Costs with Brick and Mortar Chips


As usual soft drinks will be available for those who show up in
time for the seminar. 

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        Reining in Fabrication Costs with Brick and Mortar Chips
   

                                      by
                             Martha Mercaldi Kim
                           University of Washington
                              

Abstract:

Over the years Moore's Law has provided exponential growth in the raw 
computational resources available to hardware architects.  
At the same time, however, chip fabrication costs have also 
skyrocketed, resulting in expenses that relatively few institutions 
can afford.  As part of my dissertation, I have proposed "brick and mortar" 
chips to mitigate these high fabrication costs, while offering the 
performance and integration of a modern ASIC.  This work includes 
several architectural design choices and innovations, including a 
polymorphic on-chip network design. 

I will demonstrate multiple modes of network customization that this 
design allows, including topology and buffering resources.  This single 
polymorphic network fabric can be configured to mimic the topology and 
performance of optimally designed application-specific networks with no 
appreciable overhead.  This network is not only a critical enabler of 
brick and mortar-based designs, but has broad applicability to any chip 
requiring an on-chip network.  When used with brick and mortar, however, 
low-cost, high-performance custom chips can become a reality.

Biography: 

Martha Mercaldi Kim is a Ph.D. candidate in Computer Science and Engineering 
at the University of Washington.  Prior to moving to Seattle she earned 
her B.A. in Computer Science at Harvard University and a M. Eng. in 
Embedded Systems Design from the University of Lugano in Lugano, Switzerland.  
Her research interests are in computer architecture, particularly its 
boundaries: in the hardware/software interaction, as well as the 
architecture/circuit interaction.  As a graduate student she was a member 
of the WaveScalar research group and developed an architecture to enable 
reduced-cost chip designs.