Department of Electrical and Computer Engineering
University of Wisconsin - Madison
Computer Engineering Seminar
(Fall 2009-2010)

        Speaker:    Neil Hockert
        Time:       12:00 Noon 
        Date:       November 13, 2009    
        Location:   Room 4610, Engineering Hall 
        Subject:     FFPU: Fractured Floating Point Unit for FPGA Soft Processors

As usual soft drinks will be available for those who show up in
time for the seminar. 

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          FFPU: Fractured Floating Point Unit for FPGA Soft Processors

                                      by

                                  Neil Hockert  
               Department of Electrical and Computer Engineering
                       University of Wisconsin – Madison
                         Madison, Wisconsin 53706 - 1691

Abstract:

Embedded systems designers frequently avoid using floating-point 
computation because it is too costly to include a floating-point unit 
(FPU) in an embedded processor. However, the performance of software 
floating-point libraries can be lacking. Therefore we propose a 
Fractured Floating Point Unit (FFPU)—a hybrid solution using a mix of 
custom hardware instructions and software code. An FFPU is designed as 
a compromise between software libraries and custom FPUs in both area 
and performance. We present three 32-bit FFPUs designs for a Nios II 
soft processor, and compare their performance and area to the baseline 
Nios II and a Nios II with a complete FPU. The FFPUs improve floating-
point addition and subtraction performance by 24 to 52 percent over the 
baseline, with an ALM increase of only 12 to 32 percent, and no 
increase in DSP blocks. 

Biography: 

Neil Hockert is a Ph.D student under the supervision of Professor 
Katherine Compton in Electrical and Computer Engineering at the 
University of Wisconsin-Madison.  He obtained his B.S. and M.S degrees 
from the University of Wisconsin-Madison in 2004 and 2007, 
respectively.  His research interests include reconfigurable computing 
and embedded processors.