Department of Electrical and Computer Engineering University of Wisconsin - Madison Computer Engineering Seminar (Spring 2007-2008)

        Speaker:    Dr. Seda Ogrenci Memik 
        Time:       12:00 pm 
        Date:       February 29, 2008 
        Location:   Room 4610, Engineering Hall 

        Subject:    Thermal-Aware Design 


As usual soft drinks will be available for those who show up in
time for the seminar. 

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                         Thermal-Aware Design

                                  by

                          Dr. Seda Ogrenci Memik
            Department of Electrical and Computer Engineering
                          Northwestern University



Abstract:

Steady miniaturization and large-scale integration lead to increasing power densities. 
As a result, on-chip temperatures are rising steadily as technology is scaling down. 
Making matters worse, power management techniques such as clock gating, voltage islands, 
and power gating may lead to drastic temporal and spatial variations of chip temperatures. 
As a result, temperature has become one of the most important challenges in design 
of integrated circuits. We attack the problem of thermal-aware design along three avenues. 
First, we tackle the problem at design time. We develop thermal-aware synthesis algorithms 
and tools for embedded processor design. For various stages of hardware/software co-synthesis, 
we aim to enable effective control of peak temperature and uniform thermal profiles. 
Particularly, we focus on incorporating thermal-awareness into synthesis (such as 
resource selection, allocation, and assignment, task scheduling, and memory allocation), 
and system management (such as DRAM system control). Second, we develop a self-adjusting 
paradigm to design structures with inherent resilience towards dynamic effects of temperature. 
We developed a Self-Adjusting Clock Tree Architecture (SACTA) to address this problem. 
SACTA guarantees correct timing behavior in pipelined circuits within a large range of 
thermal conditions through a self-adjusting, temperature-sensitive skew distribution 
mechanism. Finally, we approach the problem from the management perspective. 
We developed a systematic approach to design of thermal monitoring infrastructures for 
microprocessors systems. This entails, design of thermal sensing schemes and allocation 
and placement of thermal sensors in a given system. In this talk, I will first present an 
overview of research projects including interdisciplinary collaborations, which my 
group is involved with. I will then discuss two research problems in greater detail. 
I will first describe the design algorithm for the Self-Adjusting Clock Tree 
Architecture (SACTA). Finally, I will present our results and ongoing work on building 
efficient thermal sensor networks for multicore systems.

Biography: 

Dr. Seda Ogrenci Memik received her BS degree in Electrical and Electronic Engineering 
from Bogazici University, Istanbul, Turkey and her PhD in Computer Science from 
University of California, Los Angeles. She is an Assistant Professor at the Electrical 
Engineering and Computer Science Department of Northwestern University since September 2003. 
Her research interests include thermal-aware design automation, thermal management for 
high performance microprocessor systems, and embedded and reconfigurable computing. 
She received the National Science Foundation Early Career Development (CAREER) 
Award in 2006. She has served as technical program committee member, organizing 
committee member, and sub-committee chair of several conferences, including ICCAD, 
DATE, FPL, GLSVLSI, and ARC. She is an Associate Editor of the IEEE Transactions on 
Very Large Scale Integration Systems since 2007.