Department of Electrical and Computer Engineering University of Wisconsin - Madison Computer Engineering Seminar (Spring 2007-2008)

                      SPECIAL SEMINAR 

        Speaker:    Umit Ogras
        Time:       12:00 Noon  
        Date:       April 15, 2008    --- TUESDAY ---
        Location:   Room 4610, Engineering Hall  

        Subject:    Modeling, Analysis and Optimization of On-chip Communication Architectures


As usual soft drinks will be available for those who show up in
time for the seminar. 

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    Modeling, Analysis and Optimization of On-chip Communication Architectures
   

                                      by
                                 Umit Ogras
                          Carnegie Melon University
                              

Abstract:

Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational 
aspects of the problem at hand. However, as the number of processing elements on a single chip and 
their performance continue to increase, the design of the communication architecture plays a central 
role in defining the area, performance and energy consumption of the overall system. Furthermore, 
the global interconnects cause unpredictable delays and high power consumption. To mitigate these kinds 
of effects, the network-on-chip (NoC) communication architectures have emerged recently as a promising
alternative to the classical bus-based and point-to-point communication architectures.

In this talk I will cover several fundamental research problems related to modeling, analysis and optimization 
of NoC communication architectures. More precisely, I will first present a mathematical model for on-chip 
routers and demonstrate its use for NoC performance analysis and optimization. Then, I will discuss a network 
topology customization technique based on application specific long-range link insertion. Finally, I will present 
a globally asynchronous-locally synchronous NoC design that supports multiple voltage-frequency islands and 
discuss its advantages in terms of energy minimization and clock distribution.


Biography: 

Umit Y. Ogras is a postdoctoral research associate in the Department of Electrical and Computer Engineering, 
Carnegie Mellon University. He received his Ph.D. degree in Electrical and Computer Engineering from the 
same department in 2007. His research interests are in the areas of embedded systems and electronic 
design automation. In particular, he works on communication-centric design methodologies and CAD 
algorithms for newly emerged multiprocessor systems-on-chip that consist of hundreds of processing and 
storage elements. He has received an outstanding teaching assistant award from Carnegie Mellon University, 
and best paper nominations from DATE'07, DAC'07 and upcoming DAC'08